Overview
J C Bose University of Science and Technology, YMCA has announced recruitment of one temporary Research Assistant post under a HSCSIT‑funded R&D project. Eligible candidates with an M.Tech and NET/GATE qualification can apply by sending a CV to the university email by 15 Dec 2025 and attend a walk‑in interview on 23 Dec 2025. The consolidated monthly salary is INR 29,000.
Key Details
- Organization
- J C Bose University of Science and Technology, YMCA, Faridabad, Haryana
- Qualification
- M.Tech in Electronics and Communication Engineering / Electronics Engineering with minimum 55% marks or equivalent CGPA; NET/GATE in concerned subject (essential); experience in IoT, Renewable Energy Systems, Machine Learning, Power Electronics, Embedded Systems desirable.
- Vacancies
- 1
- Posted
- 14/11/2025
- Last date to apply
- 15/12/2025
Important Dates
| Notification Date | 14/11/2025 |
| Last Date to Send CV by Email | 15/12/2025 |
| Walk-in Interview Date & Time | 23/12/2025 at 10:00 AM |
Important Links
- resultOpen Link
Vacancy Details
Faridabad, Haryana: 1
Selection Process
Candidates will be selected based on an interview conducted at the Department of Electronics Engineering. A written test may be conducted on the same day if required. No TA/DA will be paid for attending the interview.
How to Apply
Prepare a detailed CV including academic details, research experience, and contact information., Send the CV by email to [email protected] on or before 15 December 2025., Report for the walk‑in interview on 23 December 2025 at 10:00 AM at the Department of Electronics Engineering, J C Bose University of Science and Technology, YMCA, Faridabad., Bring all original testimonials/documents and one set of self‑attested copies for verification at the time of the interview.
Frequently Asked Questions
What are the important dates for J.C. Bose University of Science and Technology YMCA Research Assistant Recruitment 2025 - Apply Offline for 01 Posts?
Notification Date: 14/11/2025; Last Date to Send CV by Email: 15/12/2025; Walk-in Interview Date & Time: 23/12/2025 at 10:00 AM
What is the selection process?
Candidates will be selected based on an interview conducted at the Department of Electronics Engineering. A written test may be conducted on the same day if required. No TA/DA will be paid for attending the interview.